@misc{indiciae6fe365968078,
  title = {Robustness and reproducibility of simple and complex synthetic logic circuit designs using a DBTL loop},
  author = {Cummins, B. and Vrana, J. and Moseley, R. C. and Eramian, H. and Deckard, A. and Fontanarrosa, P. and Bryce, D. and Weston, M. and Zheng, G. and Nowak, J. and Motta, F. C. and Eslami, M. and Johnson, K. L. and Goldman, R. P. and Myers, C. J. and Johnson, T. and Vaughn, M. W. and Gaffney, N. and Urrutia, J. and Gopaulakrishnan, S. and Biggers, V. and Higa, T. and Mosqueda, L. and Gameiro, M. and Gedeon, T. and Mischaikow, K. and Beal, J. and Bartley, B. and Mitchell, T. and Nguyen, T. T. and Roehner, N. and Haase, S. B.},
  year = {2022},
  doi = {10.1101/2022.06.10.495560},
  url = {https://www.biorxiv.org/content/10.1101/2022.06.10.495560v1},
  note = {Source identifier: 10.1101/2022.06.10.495560}
}